Development of the electronics industry has been accompanied by sharp demand for printed-wiring boards for mounting electronic devices thereon, such as ICs (Integrated Circuits) and LSIs (Large-Scale Integrated circuits). In response to consumer desires, manufacturers have attempted to realize compact, lightweight, and high-function electronic equipment. To this end, manufacturers have recently come to employ mounting methods using a film carrier tape, such as a TAB tape, a T-BGA tape, or an ASIC tape. Among such tapes, a CSP, a BGA, a μ-BGA, etc. are widely employed in order to produce lightweight and compact electronic equipment, since these tapes have a substrate which has an area corresponding to that of an electronic device to be mounted and which is provided with external connection terminals on virtually the entire surface thereof, so as to mount electronic devices at high mount density and enhance reliability of the mounted electronic devices.
The aforementioned flexible wiring substrate is produced through, for example, the following procedure. Firstly, copper foil is affixed onto an insulating film substrate such as polyimide film, and a photoresist is applied to the surface of the copper foil. The portion of the photoresist not covering a wiring pattern on which a photoresist mask layer is to be formed is exposed to light, and the light-exposed portion of the photoresist is removed. Then, the copper foil remaining on the photoresist-removed portion is removed through etching, and the remaining photoresist mask layer is removed, thereby forming a wiring pattern. A solder resist for forming a circuit-protective layer is applied to the thus-produced film carrier tape for mounting electronic devices thereon, excluding connection portions such as inner leads and solder balls. After application of the solder resist, a tin plating layer is formed on the connection terminal portions to be exposed, and a nickel-gold plating layer is formed on the tin plating layer. In some electronic device mounting methods, a tin-lead alloy layer has been used instead of a nickel-gold plating layer. However, in recent years, a tin-bismuth alloy or a similar alloy has replaced the tin-lead alloy, in keeping with the worldwide trend of using lead-free alloy.
Japanese Patent Application Laid-Open (kokai) No. 11-21673 discloses a plating bath for forming a lead-free tin alloy (e.g., tin-bismuth alloy) plating layer, and electronic devices provided with such plating layer.
However, plating a tin-bismuth alloy involves the problem that anomalous deposition of tin-bismuth alloy occurs in the vicinity of a solder resist layer. The phenomenon is attributable to exfoliation of a peripheral portion of the solder resist layer during or before plating, and-deposition of the tin-bismuth alloy so as to cover the exfoliated portion.
The aforementioned anomalous deposition causes short circuit of terminals of a wiring pattern, and when the deposition layer is exfoliated, exfoliated alloy is adhered to another portion of the wiring pattern, thereby also causing short circuit. Thus, the anomalous deposition is detrimental to quality of wiring patterns. The problem becomes more grave as tin-bismuth alloy plating is more widely employed so as to produce fine-pitch wiring patterns and eliminate use of lead-containing alloy.
Japanese Patent Application Laid-Open (kokai) No. 6-342969 discloses a technique in which a solder resist is provided after plating, particularly tin plating. Japanese Patent Application Laid-Open (kokai) No. 2000-36521 discloses a technique including forming a tin plating layer in which copper diffuses over a wiring pattern, forming a solder resist layer, and subsequently forming a tin plating layer containing no copper.
However, these published documents never mention the problem of anomalous deposition of tin-bismuth alloy plating or means for solving the problem.